Typically, semiconductor chips are tested to verify that they function appropriately and reliably. This is often done when the semiconductor chips are still in wafer form, that is, before they are diced from the wafer and packaged. This allows the simultaneous testing of many semiconductor chips in parallel, creating considerable advantages in cost and process time compared to testing individual chips once they are packaged. If chips are found to be defective, they may be discarded when the chips are diced from the wafer, and only the reliable chips need be packaged. Semiconductor chips may also be tested after dicing, but before packaging by assembling die on tape or a mechanical carrier.
Generally, modern microfabricated (termed MEMS) microelectronic contactor assemblies, including probe card assemblies for testing semiconductors, have at least three components: a printed circuit board (PCB), a substrate to which thousands of microelectronic contactors are coupled (which substrate may be referred to as the “probe contactor substrate”), and a compressible electrical interconnect (often in the form of an electrical “interposer”). The compressible electrical interconnect electrically connects the individual electrical contacts of the PCB to corresponding electrical contacts on the probe contactor substrate, which probe contactor substrate then relays signals to individual microelectronic contactors. The combination of the probe contactor substrate and its microelectronic contactors is sometimes referred to as a probe head.
The microelectronic contactors on the probe contactor substrate often have a very fine pitch (i.e., small distances between contactors, such as 30 μm to 200 μm) while the electrical contacts of the PCB and the interposer often have coarser pitches (>200 μm). Thus, in modern MEMS probe card assemblies, the probe contactor substrate often provides a space transformation of electrical contracts as it connects the finely pitched microelectronic contactors to the coarser pitched electrical contacts found on the interposer and PCB. Alternately, part or all of this space transformation may be off-loaded to a separate space transformer substrate of the probe head, or to other substrates or components. It is noted that some probe card assemblies do not utilize an interposer, but the general idea is unchanged.
In most applications, the required number of interconnects that need to be made between the substrates of a probe card assembly are in the thousands or tens of thousands, dictating that the PCB and the probe head be parallel (or very close to parallel), and in close proximity, so that the many interconnects therebetween can be reliably made. It is also noted that the vertical space between the PCB and the probe contactor substrate is generally constrained to only a few millimeters.
So that reliable connections to a wafer or other array of semiconductor devices can also be made, it is also important that the tips of the microelectronic contactors on the probe head lie essentially in a plane, such as a horizontal or laterally extending plane. U.S. Pat. No. 7,180,316, titled “Probe Head with Machined Mounting Pads and Method of Forming Same,” discusses the importance of the planarity of the microelectronic contactor tips (or probe tips), and is hereby incorporated herein by reference in its entirety.
It is often advantageous to test semiconductor chips to verify that they function appropriately and reliably at specific temperatures or over a range of temperatures. But exposing the various components of the probe head to varying temperatures during testing can cause dimensional changes that interfere with the planarity of the tips of the microelectronic contactors, which tends to impair the reliability of the connections to the wafer. One attempt to address this issue was described in U.S. Pat. No. 7,592,821, titled “Apparatus and Method for Managing Thermally Induced Motion of a Probe Card Assembly,” which patent is hereby incorporated herein by reference in its entirety. As shown in that patent and reproduced here for convenience, FIG. 1A illustrates an exemplary prior art probing system used to test dies (not shown) on a newly manufactured semiconductor wafer 112 or other electronic devices. The probing system of FIG. 1A includes a test head 104 and a prober 102 (which is shown with a cut-away 126 to provide a partial view of the inside of the prober 102). To test the dies (not shown) of the semiconductor wafer 112, the wafer 112 is placed on a moveable stage 106 as shown in FIG. 1A, and the stage 106 is moved such that terminals (not shown) on dies (not shown) of the wafer 112 are brought into contact with probes 124 of a probe card assembly 108. Temporary electrical connections are thus established between the probes 124 and dies (not shown) of the wafer 112 to be tested.
Typically, a cable 110 or other communication means connects a tester (not shown) with the test head 104. Electrical connectors 114 may electrically connect the test head 104 with the probe card assembly 108. The probe card assembly 108 shown in FIG. 1A includes a wiring board 120, which can provide electrical connections from connectors 114 to the probe substrate 122, and the probe substrate 122 can provide electrical connections to the probes 124.
The cable 110, test head 104, and electrical connectors 114 thus provide electrical paths between the tester (not shown) and the probe card assembly 108, and the probe card assembly 108 extends those electrical paths to the probes 124. Thus, while the probes 124 are in contact with the terminals (not shown) of the dies (not shown) on the wafer 112, cable 110, test head 104, electrical connectors 114, and probe card assembly 108 provide a plurality of electrical paths between the tester (not shown) and the dies (not shown). The tester (not shown) writes test data through these electrical paths to the dies (not shown), and response data generated by the dies (not shown) in response to the test data is returned to the tester (not shown) through these electrical paths.
To test the dies (not shown) of the wafer 112 at specific temperatures or over a range of temperatures, heating elements or cooling elements (not shown) may be included in the stage 106 or at other locations in the prober 102 to heat or cool the wafer 112 during testing. Even if heating elements or cooling elements (not shown) are not used, operation of the dies (not shown) of the wafer 112 may generate heat. Such heating or cooling from either heating/cooling elements (not shown) or from operation of the dies (not shown) may cause the wafer 112 and the probe substrate 122 to expand or contract, changing the positions of the probes 124 and the terminals (not shown) on the wafer 112, which may cause misalignment between the probes 124 and terminals (not shown) in a laterally extending plane, such as the generally horizontal “x, y” plane indicated in FIG. 1A. If such “x, y” misalignment becomes too great, the probes 124 will no longer be able to contact all of the terminals (not shown). (This horizontal plane is in the directions labeled “x, y” in FIG. 1A and will hereinafter be referred to as “x, y” movement. In FIG. 1A, the direction labeled “x” is horizontal across the page, the direction labeled “y” is horizontal into and out of the page, and the direction labeled “z” is vertical, i.e, normal to the laterally extending x, y plane. These orientation of these planes is an example provided for convenience and is not to be taken as limiting. For instance, the entire structure shown in FIG. 1A could be rotated 90 degrees, or some other orientation.)
The use of heating elements or cooling elements (not shown) to heat or cool the wafer 112 during testing, and/or the generation of heat by the dies of the wafer 112 as they are tested, may also cause a thermal gradient between the side of the probe card assembly 108 that faces the wafer 112 (hereinafter a side of the probe card assembly that faces the wafer 112 will be referred to as the “front-side” or the “wafer-side”) and the opposite side of the probe card assembly (hereinafter the opposite side of the probe card assembly will be referred to as the “back-side” or the “tester side”). Such thermal gradients can cause the probe card assembly 108 to bow or warp. If such bowing is towards the wafer 112, the probe card assembly 108 may press against the wafer 112 with too much force and damage the wafer 112 or probe card assembly 108. If such bowing is away from the wafer 112, some or all of the probes 124 may move (in a generally vertical direction with respect to FIG. 1A) out of contact with the terminals (not shown) on the wafer 112. If the probes 124 do not contact the terminals (not shown), the dies (not shown) on the wafer 112 will falsely test as failed. (Movement to or away from the wafer 112 is labeled the “z” direction in FIG. 1A and will hereinafter be referred to as “z” movement, i.e, movement normal to the lateral (“x, y”) direction.)
Typically, the probe substrate 122 is attached directly to the wiring board 120, which in turn is attached to a test head plate 121 on the prober 102. A shown in FIG. 1B, the test head plate 121 forms an opening 132 in the prober 102 into which the probe substrate 122 fits (as generally shown in FIG. 1A). The test head plate 121 may include holes 134 for bolts that secure the probe card assembly 108 to the test head plate 121. (Clamping or techniques other than bolting may be used to attached the probe card assembly 108 to the test head plate 121.) The wiring board 120 is typically made of a printed circuit board material, which is particularly susceptible to thermally induced “x, y” and “z” movements.
In view of these issues, U.S. Pat. No. 7,592,821 described an approach to counteracting thermally induced movements of a probe card assembly. As generally described with respect to FIGS. 2A-3B and FIGS. 6-7B in that patent, a system was discussed where a probe card was backed by a wiring substrate (e.g., printed circuit board), all backed by a stiffener plate that could itself be further backed by a reinforcing truss structure. When the probe card was used for temperature testing and faced heated semiconductor chips, the probe card and adjacent wiring substrate would be exposed to more heat than the more distant and shielded stiffener plate, which itself was exposed to more heat than the still more distant and further shielded reinforcing truss. A thermal gradient was thus created from the front “probe card” side to the back “reinforcing truss” side of the probe card assembly.
U.S. Pat. No. 7,592,821 taught selecting materials for the probe head assembly, stiffener plate, and truss structure so that each expands or contracts by the same amount when exposed to the different amounts of heat. That is, the probe head assembly was urged to be made of a material with a low coefficient of thermal expansion such that it expands approximately a specified distance “d” in response to its expected temperature in the temperature gradient. The stiffener plate, which would be at a lower temperature than the probe head assembly, was taught to be made of a material with a higher coefficient of thermal expansion so that it also expands the same specified distance “d” in response to its (lower) expected temperature in the temperature gradient. And the truss structure, which would be at an even lower temperature than the stiffener plate, was suggested to be made of a material with an even higher coefficient of thermal expansion so that it also expands the same specified distance “d” in response to its (even lower) expected temperature in the temperature gradient.
In practice, however, the exact temperature gradient usually cannot be known, especially ahead of time, and there are a limited number of materials available for use as the various components (i.e., there is a limited choice of coefficients of thermal expansion), so the probe card assembly described in U.S. Pat. No. 7,592,821 is still prone to thermally induced “x, y” and “z” movements, including deformation, bending, warping, etc., due to differential expansion at various temperatures of different materials that are mechanically constrained or fused together. Improved techniques for minimizing thermally induced movements of a probe card assembly are thus desirable, as well as improved techniques for dealing with any such movements that do occur.